1. Technical Field
The present invention relates generally to a semiconductor integrated circuit, and more particularly, to a phase change random access memory (PCRAM) apparatus.
2. Related Art
A phase change random access memory (PCRAM) apparatus stores data by using a phase change material which is changed into a crystalline state or an amorphous state by being cooled after being heated.
A phase change material in a crystalline state has low resistance, and a phase change material in an amorphous state has high resistance. Thus, the crystalline state may be defined as set or data ‘0’, and the amorphous state may be defined as reset or data ‘1’.
In general, a PCRAM apparatus performs a firing process so that a phase change can normally occur.
By a firing process, a larger amount of firing current than the reset current is supplied to the memory cells, and this removes the impurities remaining on the surface of a PCRAM.
In particular, during a firing process, an amount of current that is larger than the amount supplied by a write driver needs to be provided to the memory cells.
To do this, a test mode is applied to a pulse width control unit that outputs a pulse width control signal for controlling the current amount proportional to the pulse width, so that the pulse width of a desired duration that is longer than a preset time is provided to a write driver. Then, because the pulse width is set to a larger value than a preset time, a larger amount of current can be provided.
However, there is a limitation as to the maximum high-voltage level that can be provided to a write driver, and as a result is there is also a limitation in the current amount that can be supplied to a memory cell in comparison to the rate of the high voltage level increase.
Furthermore, too high voltage when supplied to a write driver could destroy the transistors in the write driver.
In addition, for a sufficient firing process, the current needs to be supplied for a lengthy period of time, and this may appear to present no significant problems when performing a firing process on a small number of memory cells; however, a firing operation in general is performed on all memory cells, not just on a few among many memory cells. Therefore, an undesirably lengthy test will inevitably take place.
There are proposed techniques to perform a firing operation on a plurality of memory cells simultaneously; however, it would be difficult realize because a write driver has no ability of driving a plurality of memory cells.